1. Field of the Invention
The present invention relates to a method of fabricating a memory and a memory, and more specifically, it relates to a method of fabricating a memory including a storage material film such as a ferroelectric film or a colossal magnetoresistance (CMR) film and a memory.
2. Description of the Background Art
In general, a device having a ferroelectric film is expected for application to various fields such as that of electronics, due to characteristics such as ferroelectricity. For example, a nonvolatile ferroelectric memory utilizing polarization hysteresis or the like is studied. For example, Japanese Patent Laying-Open No. 2001-210795 discloses such a ferroelectric memory. A nonvolatile memory utilizing a colossal magnetoresistance material whose resistance is remarkably varied with pulse application of a voltage or the like is also proposed in general. The nonvolatile memory employing a colossal magnetoresistance material holds data through variation in the resistance value of a colossal magnetoresistance material film held between upper and lower electrodes.
A nonvolatile memory employing a ferroelectric film holds data by spontaneous polarization of a ferroelectric material held between upper and lower electrodes. A one-transistor one-capacitor ferroelectric memory having memory cells each constituted of one ferroelectric capacitor and one switching transistor is known as such a ferroelectric memory. In the one-transistor one-capacitor ferroelectric memory, however, switching transistors must be arranged on the respective memory cells, and hence it is disadvantageously difficult to improve the degree of integration. To this end, a nonvolatile memory consisting of a simple matrix (cross-point) ferroelectric memory having memory cells each constituted of only one ferroelectric capacitor is proposed in general. In this simple matrix ferroelectric memory, the area of each memory cell constituted of only one ferroelectric capacitor can be extremely reduced. Consequently, the degree of integration can be improved.
FIG. 16 is a sectional view showing the structure of a conventional simple matrix ferroelectric memory. Referring to FIG. 16, a lower electrode 102 is formed on a substrate 101 in the conventional simple matrix ferroelectric memory. Upper electrodes 104 are formed on prescribed regions of the lower electrode 102 through ferroelectric films 103. The lower electrode 102 is connected to word lines (not shown), for example, and the upper electrodes 104 are connected to bit lines (not shown), for example. The lower electrodes 102, the ferroelectric films 103 and the upper electrodes 104 constitute ferroelectric capacitors 110. Each memory cell is constituted of only each ferroelectric capacitor 110.
FIGS. 17 and 18 are sectional views for illustrating a process of fabricating the conventional simple matrix ferroelectric memory shown in FIG. 16. The process of fabricating the conventional simple matrix ferroelectric memory is now described with reference to FIGS. 16 to 18.
First, the lower electrode 102, a ferroelectric film layer 103 and an upper electrode layer 104 are successively deposited on the substrate 101, as shown in FIG. 17. Thereafter photoresist films 105 are formed on prescribed regions of the upper electrode layer 104. The photoresist films 105 are employed as masks for etching the upper electrode layer 104 and the ferroelectric film layer 103, thereby partially exposing the lower electrode 102. Thus, the upper electrodes 104 and the ferroelectric films 103 are patterned as shown in FIG. 18. Thereafter the photoresist films 105 are removed thereby forming the conventional simple matrix ferroelectric memory as shown in FIG. 16.
In the conventional simple matrix ferroelectric memory shown in FIG. 16, the upper electrodes 104 and the ferroelectric films 103 are so patterned in the same shapes that the ferroelectric films 103 are present not obliquely under but only immediately under the upper electrodes 104. In this case, the structure disadvantageously prevents contribution of components of the ferroelectric films 103 polarized due to electric fields transversely leaking from the upper electrodes 104. When the structure prevents contribution of components of the ferroelectric films 103 polarized due to electric fields transversely leaking from the upper electrodes 104, the quantities of remanence of the ferroelectric films 103 are reduced to reduce the strength of signals read from the ferroelectric capacitors 110. Consequently, it is difficult to improve read signal detection accuracy.
The aforementioned problem also results when the ferroelectric films 103 are replaced with colossal magnetoresistance materials. In other words, the structure prevents contribution of resistance components of the colossal magnetoresistance materials due to electric fields transversely leaking from the upper electrodes 104, to disadvantageously reduce signal detection accuracy.
In order to solve the aforementioned problem, only the upper electrode layer 104 may be etched without etching the ferroelectric film layer 103 in the step shown in FIG. 18. If only the upper electrodes 104 are patterned by etching only the upper electrode layer 104 through the photoresist films 105 serving as masks in the step shown in FIG. 18, however, chlorine-system etching gas employed for etching the upper electrode layer 104 of Pt, for example, newly disadvantageously corrodes the exposed surface portions of the ferroelectric film layer 103. If the exposed surface portions of the ferroelectric film layer 103 are corroded, the corroded portions lose the ferroelectric function, and hence it is consequently difficult to obtain components of the ferroelectric films 103 polarized due to the electric fields transversely leaking from the upper electrodes 104. This problem also arises when the ferroelectric film layer 103 is replaced with a colossal magnetoresistance material. Consequently, it is difficult to improve read signal detection accuracy.